ASIC ENGINEER (Timing)
As a member of our ASIC
backend/timing team, you'll be working on product designs, focusing on such
tasks as clocks/timing convergence/chip layout planning and scripting of flows.
Specifically you'll be focusing on full chip layout planning (partitioning,
planning clock distribution and other structures, methodology), full chip
timing closure (primetime scripts, other tools, etc) and gate-level design of high-speed
logic .In this role you will also interface with core physical design teams,
design methodology teams and custom design teams to drive timing
analysis/closure all the way from micro-architecture to tape-out.
Send your resume to : snaikshelar@nvidia.com
Jobsworld4you Team
